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makemaintain program-generated and interdependent files |
Command |
make [-EeiMnpqrstuVvx]
[-k|-S] [-c dir]
[-f file]
[-D macro definition ...]
[macro definition ...] [target ...]
make is a command that helps you manage projects that
contain a set of interdependent files. Typical examples would be a program with
many source and object files, or a document that is built from source files,
macro files, and so on. make keeps all the files up-to-date
with one another: if one file changes, make updates all the
other files that depend on the changed file.
make features the
.POSIX special target to provide maximum portability. When
you specify this target, make processes the makefile
as specified in the POSIX.2 standard. For details, see the description of
.POSIX in the
Special Target Directives
section of this reference page.-c dirmake cannot change the directory, it displays an error
message. This is useful for recursive makefiles when building in a
different directory.-D macro definitionmake assigns the value to the
macro before reading the makefile; any definition of the same macro
contained in the makefile supersedes this definition. Note that
make uses any macros defined in this way before it
reads any makefile, including the startup file. This allows you to define
a startup file by providing a value for MAKESTARTUP on the
command line:
make -D MAKESTARTUP=$HOME/project/startup.mk
-E-e-E or -e,
make reads the environment before reading the
makefile, except for the SHELL environment
variable, which you must explicitly import. This option does not affect
the value of MAKEFLAGS.-f file.MAKEFILES special target. If you
specify file as dash (-), make
reads from standard input.-i.IGNORE attribute or macro.-k-k, make ignores the error and
continue to make as much as possible. make does not
attempt to update anything that depends on the target that was being made
when the error occurred.-MMAKEFLAGS environment variable to the
MAKEFLAGS macro.-nmake would execute to
update the chosen targets, but does not actually execute any recipe lines
unless they have a plus sign (+) command prefix.
make displays recipe lines with an at sign
(@) command prefix on the standard output.
With group recipes, make displays the commands it uses
to update a give target, but it also executes the commands.
If make finds the string $(MAKE) in a
recipe line, it expands it, adds -n to the
MAKEFLAGS, and then executes the recipe line. This allows you
to see what recursive calls to make do. The output
correctly shows line breaks in recipes that are divided into several lines
of text using the \<newline> sequence.-pmake
itself cannot read this output as an input file.-qmake
exits with a status of 0; otherwise, it exits with a status of 1 (typically
interpreted as an error by other software). make does
not run commands associated with the target unless they start with a plus
sign (+) command prefix.-r-Smake if an error occurs when bringing a
target up-to-date (opposite of -k). This is the
default.-s-t option). This is equivalent to the
.SILENT attribute or macro.-t+) command
prefix. make does not touch up-to-date targets or
targets that have prerequisites but do not have recipes.
make displays a message for each touched target file
indicating the file name.-umake behaves as if all
the prerequisites of the given target are out-of-date.-Vmake and a list of
built-in rules.-vmake's progress,
including files read, definition and redefinition of each macro, meta-rule
and suffix rule searches, and other information.-xmake begins making targets (but after it reads the
entire makefile).make updates all targets that are specified on the command
line. If you do not specify any target, make updates the
targets in the first rule of the makefile. A target is out-of-date if it is
older than any of its prerequisites (based on modification times) or if it does
not exist. To update a target, make first recursively
ensures that all the target's prerequisites are up-to-date, processing them in
the order they appear in the rule. If the target itself is out-of-date,
make then executes the recipe associated with the target.
If the target has no associated recipe, make considers it
up-to-date.
make also supports another form of targets, known as
special targets, described in the following
Special Target Directives
section.
-f option,
make looks for a file in your current directory named
makefile. If make does not find this file, and
if your file system supports mixed case file names, it searches your current
directory for a file named Makefile. If make
finds either file, it uses this file as your makefile.
You can change the default makefiles with the .MAKEFILES special
target. This target is already specified in the startup.mk file.
See the following
Special Target Directives
section for more information.
is the usual form. If string contains macro references,macro = string
make does not expand them when the macro is defined, but
when the macro is itself expanded.
expands macros inside string before assigning the value to macro.macro := string
appends string to the previous value of macro. You can use any amount of white space on both sides of macro operators.macro += string
make defines the name macro to have the value
string and replaces it with that value whenever it is used as
$(macro or ${macro} within
the makefile. It is possible to specify a $(macro_name or
${macro_name} macro expansion where
macro_name contains more $(...) or ${...} macro
expansions itself.
Normally, make does not include white space at the beginning
and end of string in the definition of macro; however, it never
strips white space from macros imported from the environment.
If you want to include white space in a macro definition specified on the
make command line, you must enclose the definition in quotes
(" ").
make defines macros in the following order:
-D option.-D
option.-e option, make
reads the makefiles before reading the contents of the environment. If you
specify the -E option, make does
not read the contents of the environment.make encounters a new
definition for it, the new definition replaces the old one. For example, a macro
definition for name on the command line (without -D)
overrides a definition for name in the makefile. You can use the
-v option to display macro assignments, as
make performs them.
Possible modifiers are:$(macro_name:modifier_list:modifier_list:...)
^"string" prefix tokens
+"string" suffix tokens
b file portion of all path names, without suffix
d directory portion of all path names
f file portion of all path names, including suffix
l characters mapped to lowercase
s/pat/string/ pattern substitution;
any character can be used to separate the pattern from the string
suffix=string suffix replacement
t"separator" tokenization with given separator
u characters mapped to uppercase
produces the following expansions:test = D1/D2/d3/a.out f.out d1/k.out
$(test:d) -> D1/D2/d3 . d1
$(test:b) -> a f k
$(test:f) -> a.out f.out k.out
${test:DB} -> D1/D2/d3/a f d1/k
${test:s/out/in/} -> D1/D2/d3/a.in f.in d1/k.in
$(test:f:t"+") -> a.out+f.out+k.out
$(test:t"+") -> D1/D2/d3/a.out+f.out+d1/k.out
$(test:u) -> D1/D2/D3/A.OUT F.OUT D1/K.OUT
$(test:l) -> d1/d2/d3/a.out f.out d1/k.out
$(test:^"/rd/") -> /rd/D1/D2/d3/a.out /rd/f.out /rd/d1/k.out
$(test:+".Z") -> D1/D2/d3/a.out.Z f.out.Z d1/k.out.Z
$@mylib(member)
$@ expands to
mylib.
$%mylib(member)
$% expands to
member
$>$*$(%:db)) or the value of the
stem in a meta-rule.$&:: rules, this macro produces a value identical to the
$^ macro.$?:: rule
operator, this macro expands to the same value as $<.$^$^ symbol appears.$<:! rule operator, this macro expands to the current
out-of-date prerequisite.B,
D and F to indicate only the directory portion of the
target name (the current directory is represented by a dot (.)),
or only the file portion of the target name. For example, define.h
is the only out-of-date prerequisite, the macros $(?B),
$(?D) and $(?F) expand to define, dot (.)
and to define.h, respectively.
The constructs $$@, $$%, $$>, and
$$* yield meaningful results when placed in a prerequisite list as
a dynamic prerequisite.
$$@ stands for the target currently being made. The following two
examples are equivalent:
The construct may be modified:fred : $$@.c fred : fred.c
If you are building a library,fred.obj : $$(@:b).c
$$% stands for the name of the
archive member being made. If you are building a normal target, $$%
stands for the name of the target currently being made.
$$* stands for the name of the current target being made,
but with no suffix.
If you are building a library, $$> stands for the name of the
archive library being made. If you are not building a library, its use is
invalid.
#) character and extend to
the end-of-line. make discards all comment text.
\) at the very end of the line. You can use
this technique to extend comments as well as recipe lines and macro definitions
for example.
If a rule or macro definition must contain a # character, use
\#; otherwise, make mistakes the #
for the beginning of a comment. Also, if a macro definition must contain a
single $ character, use $$.
File names that contain a colon (:) must always be enclosed in
quotes (" "):
"a:target" : "a:prereq"
targets [attributes] ruleop [prerequisites] [;recipe]
{<tab> recipe}
:, that separates the target names
from the prerequisite names and may also affect the processing of the
specified targets.;). If
such a recipe is present, make takes it as the first
in the list of recipe lines defining how to make the named targets.
Additional recipe lines may follow the first line of the rule. Each
subsequent recipe line must begin with a tab character.targets : prereqs:: rule operator,
whose description follows.targets :! prereqs$< macro
expands to the current prerequisite if it appears in rules with this rule
operator.targets :^ prereqstargets :- prereqstargets :: prereqstargets :| prereqsmake to treat
each meta-dependency as an independent meta-rule. For example:
is equivalent to%$O :| archive/%.c rcs/%.c /srcarc/RCS/%.c recipe...
This operator is particularly useful for searching for MKS Source Integrity archives. If the%$O : archive/%.c recipe... %$O : rcs/%.c recipe... %$O : /srcarc/rcs/%.c recipe...
RCSPATH variable
used by MKS Source Integrity is defined as
then the meta-rulearchive/%f;rcs/%f;/srcarc/rcs/%f
searches the path looking for an RCS file and checks it out.% :| $(RCSPATH:s/%f/%/:s/;/ /) co -l $<
is a within-rule circular dependency.c.o : a.o b.o c.o
make detects a
within-rule circular dependency when it is parsing the makefile to build the
dependency tree.
A between-rule circular dependency occurs when you have two targets, each of
which includes the other's name in its prerequisite list. For example,
is a between-rules circular dependency.a.o : b:o b:o : a.o
make detects a
between-rule circular dependency when it is processing the dependency tree built
during the parse phase.
Normally make only detects circular dependencies for those
targets actually being built. When a circular dependency is encountered,
make issues a warning message, removes the offending
prerequisite from the list, and continues parsing the makefile. The
.CYCLECHECK special target can be used to alter
make's treatment of circular dependencies. For details, see
the Special Target Directives
section of this reference page.
-, @,
+ or all three). - indicates that
make is to ignore non-zero exit values when it executes this
recipe line. @ indicates that make is not to
display the recipe line before executing it. + tells
make to always execute this line, even when
-n, -q, or -t is
specified.
Group recipes begin with [ in the first non-white space position
of a line, and end with ] in the first non-white space position of
a line. Recipe lines in a group recipe need not have a leading tab.
make executes a group recipe by feeding it as a single unit
to a shell. If you immediately follow the [ at the beginning of a
group recipe with one of -, @ or +, they
apply to the entire group in the same way that they apply to single recipe lines.
make's default behavior. They provide a superset of the
functionality of suffix rules. make searches all meta-rules
before using suffix rules.
make uses the inference rules to infer how it can bring a
target up to date. A list of inference rules defines the commands to be
executed. The default startup.mk contains a set of inference rules
for the most common targets. You can specify additional rules in the makefile.
When make finds no explicit target rule to update a target,
it checks the inference rules. If make finds an applicable
inference rule with an out-of-date prerequisite, it executes that rule's recipe.
(See also the section describing the .DEFAULT special target).
% that
matches an arbitrary string called the stem. The % in a dependency
stands for the stem.
The inference rule to update a target matching pattern
p1%s1, where p1 and s1 are prefix and
suffix strings of the target, having a prerequisite
p2%s2, where % is the stem from the
target, is specified as follows:
Either the prefix or suffix string may be empty.p1%s1 : p2%s2 ; recipe...
When you specify%$O : %.c ... rule body... %.c : %.y ... rule body ...
make file.obj
make uses the first meta-rule to look for
file.c. If it cannot find an explicit rule to build
file.c, it again looks through the meta-rules for a rule to build
%.c. It finds such a rule in
Thus,%.c : %.y
make can rebuild file.obj from
file.y.
make considers each meta-rule only once when performing
transitive closure to avoid a situation where it loops forever. For example,
if you have the rule
the command% : %.c ... rule body ...
causesmake file
make to look for file.c. If the
meta-rules were not restricted and file.c did not exist, then
make would look for file.c.c, and then
file.c.c.c, and so on. Because make uses each
meta-rule only once, this cannot happen.
make computes transitive closure once for each meta-rule
head the first time the pattern matches a target. When transitive closure is
computed, make adds all the computed rules to the rule set
for that meta-rule head. For example, if you have the rules
and you are making file.exe, this target matches successfully against%$E : %$O recipe 1... %$O : %c recipe 2...
%$E causing make to compute transitive closure
for %$E. As a result of this computation, a new rule is created:
%$E : %.c recipe 2... recipe 1... .REMOVE target recipe for %$O, if not .PRECIOUS
make executes this rule if file$O.obj does not exist.
When make finishes the computation for the rule head, it
marks the rule head as transitive closure computed. Since
make adds all possible new rules to the rule set the first
time the computation is done, it is not necessary to do it again -- nothing new
is added.
The best way to understand how this works is to experiment with little
make files with the -v option specified.
This shows you in detail what rules are being searched, when transitive closure
is calculated and what rules are added.
make to generate new rules,
it is important to understand the order this is done in:
make searches for explicit rules in the order they
appear, so explicit rules always take precedence.make reads meta-rules in the order they appear in the
makefile. The first rule that appears in the makefile is the first one
checked.startup.mk:
%$O : %.c
rule1
-v option, make
prints a warning when it replaces a meta-rule.make always finds the explicit rules first, so they
take precedence over generated rules. You can use the
-v option to see what rules make
generates and the order they appear in.make performs two passes through the rules. On the
first pass it attempts to find a match with an explicit rule in the
makefile; if this does not succeed, make performs a
second pass to find a match with an existing file.make treats targets that begin with a period and contain no
slashes or percent signs as suffix rules. If there is only one period in the
target, it is a single-suffix inference rule. Targets with two periods are
double-suffix inference rules. Suffix rules do not have prerequisites but do
have commands associated with them.
When make finds no explicit rule to update a target, it
checks the suffix of that target (.s1) against the suffix rules.
make examines a prerequisite based on the base name of the
target with the second suffix (.s2) appended, and if the target is
out-of-date with respect to this prerequisite, make executes
the recipe for that inference rule.
If the target to be built does not contain a suffix and there is no rule for the
target, make checks the single suffix inference rules. The
single suffix inference rules define how to build a target 'br 'ne 5v
if make finds a rule with one of the single suffixes appended.
A rule with one suffix .s2 defines how to build target from
target.s2.
Any suffixes used in a suffix rule must appear as a prerequisite of the special
target .SUFFIXES. The order that the suffixes appear in the
.SUFFIXES rule determines the order make checks
the suffix rules in. New suffixes and suffix rules are added to the existing
list. To turn off the suffix rules, place
in your makefile. This clears the prerequisites of the.SUFFIXES:
.SUFFIXES
target and prevents the enaction of any suffix rules.
The search algorithm used for suffix rules depends on whether or not the
.POSIX special target is specified. When .POSIX is
specified, the following steps describe the search algorithm for suffix rules:
.SUFFIXES list? If not, then quit the search..SUFFIXES list, look for a double suffix rule
that matches the target suffix..SUFFIXES
target..POSIX special target is not specified,
make handles suffix rules in the same manner as traditional
implementations of make. The following steps describe the
search algorithm for suffix rules in this situation.
.SUFFIXES list? If not, then quit the search..SUFFIXES list, look for a double suffix rule
that matches the target suffix..SUFFIXES
target.
.suf.a:
recipe
If.SUFFIXES: .a .obj .obj.a: echo adding $< to library $@
mem.obj exists, then the following command
causesmake -r "mylib(mem)"
make to print this message:
Refer to Making Libraries in the User's Guide for more information about libraries.adding mem.obj to library mylib
make defines several target attributes. Attributes may be
assigned to a single target, a group of targets, or to all targets in the
makefile. Attributes affect what make does when it needs to
update a target. You can associate attributes with targets by specifying a
rule of the following form:
This assigns the attributes in attribute_list to the given targets. If you do not specify any targets, the attributes apply to every target in the makefile. You can also put attributes inside a normal rule, as in:attribute_list : target ...
These are the recognized attributes:targets attribute_list : prerequisite ...
.EPILOG.IGNORE.LIBRARY.PRECIOUS.PROLOG.SETDIR.SETDIR=path, where path is the path name of
desired working directory. If path contains any colon
(:) characters, the entire attribute string must be quoted,
not just the path name..SILENTmake.
The special target must be the only target in a special rule--you cannot list
other normal or special targets.
Some special targets are affected by some attributes. Any special target can be
given any attribute, but often the combination is meaningless and the attribute
has no effect.
.BRACEEXPAND.POSIX special target is set.) Older versions of
make use brace expansion to expand a token list of
this form:
string1{token_list}string2
make adds string1 to the front, and
string2 to the end, of each token in the token_list. To
include brace brackets while this target is set, use {{ and
}}; you cannot include literal brace brackets in the token
list. You can achieve the same kind of brace expansion in modern versions
of make by using macro expansion with prefix and
suffix modifiers:
Note that the double quotes are required. Future versions of MKS Make may dispense with brace expansion completely.$(TOKEN_BASE:^"prefix":+"suffix")
.CYCLECHECKmake treats
circular dependencies (for more information, see the
Circular Dependencies section
of this reference page). You can specify one of five attributes with this
target. If you specify more than one attribute, an error message results.
The five attributes are:.SILENTmake remains silent about any within-rule and
between-rule circular dependencies, removes the offending dependency from
the list of prerequisites, and continues..WARNTARGmake issues warnings for named targets with circular
dependencies. If the name of the dependency is the same as the named
target, it is removed from the list of prerequisites and
make continues. This is the default behavior if
.CYCLECHECK is not specified or is specified with no
attributes..WARNALLmake issues warnings for all within-rule circular
dependencies regardless of whether the target is being built or not and
for all between-rule circular dependencies for the named targets. The
offending dependency is removed from the list of prerequisites and
make continues..FATALTARGmake treats all circular dependencies for named
targets as fatal errors. It issues an error message and exits..FATALALLmake treats all within-rule circular dependencies as
fatal errors whether the target is being built or not. It also treats all
between-rule circular dependencies for named targets as fatal errors.
make issues an error message and exits.
For example, to set the circular dependency check to
make's default, use the rule:
.CYCLECHECK .WARNTARG:
.DEFAULTmake can apply no other rule to produce a target, it
uses this rule if it has been defined..ERRORmake executes the recipe associated with this target
whenever it detects an error condition..EXPORT.GROUPEPILOGmake adds the recipe associated with this target after
any group recipe for a target that has the .EPILOG
attribute..GROUPPROLOGmake adds the recipe associated with this target
before any group recipe for a target that has the
.PROLOG attribute..IMPORTmake searches in the environment for prerequisite
names specified for this target and defines them as macros with their
value taken from the environment. If the prerequisite
.EVERYTHING is given, make reads in the
entire environment (also, see the -e and
-E options)..INCLUDEmake reads one or more additional makefiles (specified
in the prerequisite list), as if their contents had been inserted at this
point. If the prerequisite list contains more than one file,
make reads them in order from left to right.
make uses the following rules to search for extra
makefiles:
< and >),
make looks in the current directory. If the file is
not present, make then looks for it in each directory
specified by the .INCLUDEDIRS special target.< and
>), make only searches in the
directories specified by the .INCLUDEDIRS special target.make looks for that
file, and ignores the list associated with the .INCLUDEDIRS
special target..INCLUDEDIRS.MAKEFILES.NOAUTODEPEND.POSIXmake to use the shell when executing all
recipe lines; make invokes one shell per line,
regardless of the setting of SHELLMETAS..BRACEEXPAND special target is
ignored).make does not check for the string
$(MAKE) when run with the -n options
specified.make always prints a message if no work is done..REMOVEmake uses the recipe of this target to remove any
intermediate files that it creates if an error is encountered before
creating the final target. This .REMOVE target only deletes
a file that satisfies all of the following criteria:
make began running.PRECIOUS attribute.SOURCE.SOURCE.x.SOURCE, except that make
searches the .SOURCE.x list first when trying to locate a
file matching a target with a name that ends in the suffix
.x..SUFFIXESmake appends the prerequisite list of this target to
the set of suffixes used when trying to infer a prerequisite for making a
target using suffix rules. If you specify no prerequisites,
make clears the list of suffixes, effectively
disabling suffix rules from that point on.make defines a number of control macros that, like special
target directives and attributes, alter its behavior. A control macro that has
the same function as a special target or attribute also has the same name.
Macros that are said to be defined internally are automatically created
by make and you can use them with the usual
$(name construct. For example, you can use
$(PWD) to obtain the current directory name.
Recognized control macros are:
DIRSEPSTRmake uses the first character in this
string to build path names when necessary.
DIRSEPSTR macro must be set in your environment
before running make, so that the
MAKEDIR macro is aware of its value. This is necessary
because MAKEDIR is set before the makefile or
command-line flags are looked at..EPILOG.EPILOG attribute is
given to every target.GROUPFLAGSGROUPSHELL when
make invokes it to execute a group recipe.GROUPSHELLmake calls to
process group recipes.GROUPSUFFIXmake to use as a suffix when
creating group recipe files to be handed to the shell..IGNOREmake assigns the
.IGNORE attribute to every target.INCDEPTHMAKEThe$(MAKECMD) $(MFLAGS)
MAKE macro is not used by make itself,
but the string $(MAKE) is recognized when using the
-n option for single line recipes.MAKECMDmake was invoked with.MAKEDIRmake
began execution.MAKEFLAGSMAKEFLAGS macro contains all the options and macros
specified in the MAKEFLAGS environment variable
plus all the options specified on the command line, with the following
exceptions:
-c, -D, -f, and -p are
silently ignored if they are found in the
MAKEFLAGS environment variable.-c, -D, -f, -p, -v, or
-V, when specified on the command line, are not added
to the MAKEFLAGS macro.-M option is specified, macro definitions
from the MAKEFLAGS environment variable are not
added to the MAKEFLAGS macro.MAKEFLAGS environment variable
may have leading minus signs and can be separated by spaces. These are
stripped out when the MAKEFLAGS macro is constructed.
make always reads the
MAKEFLAGS environment variable before reading
the makefile. The -E and -e
options do not affect this.MAKESTARTUPMAKESTARTUP environment
variable before running make. You can also specify a
value for this control macro on the command line, if you use the
-D option:
make -DMAKESTARTUP=$HOME/project/startup.mk
MFLAGSMAKEFLAGS, except that it includes the leading switch
character.NULLOSmake is
compiled for.
unix on UNIX systems POSIX on POSIX systems
.PRECIOUSmake assigns
the .PRECIOUS attribute to every target..PROLOGmake assigns
the .PROLOG attribute to every target.PWDmake is
executing.SHELLmake
calls to process single line recipes if they contain one or more of the
characters given in SHELLMETAS. Otherwise,
make executes these commands directly. By default,
the value of the SHELL environment variable
does not affect the value of this macro; however, you can use the
.IMPORT special target to assign the environment variable's
value to this macro. You can also use the EXPORT special
target to assign this macro's value to the
SHELL environment variable.SHELLFLAGSSHELLMETASmake finds any metacharacter, it invokes the recipe
using the shell specified by SHELL; otherwise, it executes
the recipe without the shell..SILENTmake assigns
the .SILENT attribute to every target.SWITCHAR.LIBRARY attribute and list its
prerequisites. The prerequisites should be the object members that are to go
into the library. When make makes the library target, it
looks for the prerequisites in the library if it cannot find an appropriate
object file.
When make finds lib(member), it declares the
lib portion as a target with the .LIBRARY attribute and
automatically declares the member portion as a prerequisite of the
lib target. When make finds lib((entry)), it
declares the lib portion as a target with the .LIBRARY
attribute and automatically declares the module defining entry as
lib's associated prerequisite.
This autodependency can be turned off by the .NOAUTODEPEND special
target. Since autodependency is not POSIX compatible, it is also disabled by
the .POSIX special target.
.IF expression
... if text ...
{.ELSIF expression2
... elsif text ...}
[.ELSE
... else text ...]
.END
.IF, .ELSE, .ELSIF, and
.END must start in the first column of the line. expression
or expression 2 can have one of three forms:
is true if the given string is non-empty,string
is true if the two strings are equal, andstring == string
is true if the two strings are not equal. Typically, one or both strings contain macros thatstring != string
make
expands before comparing. make also discards white space at
the start and end of the text portion before the comparison. This means that a
macro that expands to nothing but white space is considered an empty value for
the purpose of the comparison. If a macro expression needs to be compared to an
empty string, compare it to the value of the macro NULL for
readability.
The text enclosed in the conditional construct must have the same format that
it would have outside the conditional. In particular, make
assumes that anything that starts with a tab inside the conditional is a recipe
line. This means that you cannot use tabs to indent text inside the conditional
(except, of course, for recipe lines that always begin with tabs).
make supports the following function:
$(shell shell_cmd)
performs the same function that backquotes (`shell_cmd`) do in most shells. That is, it performs command substitution, returning the output of the specified shell command, shell_cmd and substituting it into the surrounding text, after first replacing each newline or carriage-return/newline pair with a single space and removing any trailing newline or carriage-return/newline pair. The command specified with the shell function is run when the the function call is expanded. Because this function involves spawning a new shell, you should carefully consider the performance implications of using the shell function within recursively expanded variables as opposed to simply expanded variables.
MAKEFLAGSmake options that are used as the
default options for any make command. You may specify
the options with or without leading minus signs (-) and
blanks between them. It may also include macro definitions of the form
usually found on the command line.MAKESTARTUPmake startup file. By
default, make uses the file
/etc/startup.mk as its startup file. To use a different file,
set this environment variable before running make.SHELLSHELL, use the .IMPORT special target. You can
also use the .EXPORT special target to assign the value of
the SHELL macro to this environment variable for commands
run from recipes.make automatically imports all other environment variables,
unless you specify the -E option.
/etc/startup.mkmake returns the exit status of the failed command. Since
most commands use exit statuses between 0 and 10, make uses
exit status values below 10 only for failures that do not run recipe lines.
Possible exit status values for Make are:
-q and file is not up to
date.-fSIGINT (CTRL-C) is frequently signal 1: the return code from
Make is 128|1, or 129.:=.END for .IF.IF nesting too deep.ELSE without .IF.END<target><+ diversion unterminated<+ diversion cannot be nested<+ missing before +>]% rules% rule, missing % target.INCLUDE file(s) specified((NAME)SHELL macro not defined/....."rule"-c dir, -D
macro_def'n, -E, -M,
-u, -V, -v,
-x.-n option has enhanced functionality not covered
by the standard; for more information see the explanations of the
-n option and the .POSIX special target
in this reference page.$&, $^,
$>.$$%, $$>,
$$*, $$@.macroname := stringassigned macroname += stringassigned
"a:target" : "a:prerequisite"
:)..IGNORE,
.PRECIOUS, .SILENT..DEFAULT, .POSIX,
.SUFFIXES.SHELL (referred to
in POSIX.2 as control macros)..POSIX special target is specified, but behaves like
traditional implementations when it is not specified..SETDIR special target is used, MKS Make checks the file
attributes of targets and prerequisites on every pass through a rule. This can
significantly increase the number of file system accesses.
makefile