Allegro: SPLash!/UX Technical Architecture

The default mode of operation for the SPLash! compiler is to conform to the addressing conventions and processing philosophy of the MPE/V-based HP 3000 line, making migration of your source code as painless as possible. This means that all address modes and data types are treated as they would be on the 16-bit HP 3000, not the 32-bit PA-RISC machines. The adherence of SPLash! to the SPL/V processing philosophy facilitates conversion to the new 32-bit architecture.

SPLash!/UX is run via a command line, like other HP-UX programs:

   splash [ [-input] filename ]  [options]

   options ::=
      -asm               invoke 'as' at end of compilation
      -debug             invoke 'debugger'
      -input filename    specifies input file; synonym: -i
      -list  (or: +L)    generate listing
      -L filename        send listing to filename, implies -list
      -noasm             don't assemble ('as')
      -nolist            don't generate listing
      -nosplashg         don't read /opt/allegro/splash/splashg
      -nosummary         don't emit summary of compilation
      -output filename   for .o filename;  synonym: -o
      -s filename        for .s filename
      -splashg           read /opt/allegro/splash/splashg first
      -splc filename     filename for $PPC output
      -splerrs filename  filename for error information (Qedit)
      -summary           display compilation summary; syn: -v
      -version           report version (and terminate)
   
   default options: -asm -nolist -nosummary -splashg

Procedures written in SPLash! come in two modes: Native Mode procedures and SPLash! Mode procedures. Native Mode procedures use the full Native Mode calling conventions, and are completely callable from any Native Mode language, including gcc, HP C, HP Pascal, HP FORTRAN, and SPLash!. Native Mode procedures deal solely with 32-bit and 64-bit addressing.

SPLash! Mode procedures use the traditional stack-based method of calling procedures. As such they are callable only from a SPLash! outer block or from other SPLash! Mode procedures. By default, SPLash! Mode procedures use 16-bit "DB" relative addresses, but these addresses are automatically converted to 32-bit and 64-bit addresses when calling Native Mode procedures (e.g., FREAD), or system calls (e.g., fread()). SPLash! Mode procedures can also declare pointers and arrays which will use 32-bit and 64-bit addresses, thereby allowing access beyond the bounds of the emulated 64KB stack.

In the design and implementation of SPLash!, every attempt has been made to maintain full compatibility with the existing SPL language.

In general, all statements in the SPL language as documented in the SPL reference Manual (HP part number 32100-90000) and the SPL Pocket Guide (HP part number 32100-90001) are supported by the SPLash! compiler.

There are three issues that are most often raised concerning the implementation of SPL in Native Mode:

access to both native system calls (e.g., fopen()),
compatibility with the debugging facilities,
support for the SPL ASSEMBLE statement.

Access to system calls is easy with SPLash!/UX, since they're declared just like an MPE intrinsic, or any other external procedure declaration. SPLash! can also read intrinsic definition files (e.g., as created by HP Pascal's $buildint$). To promote portability, SPLash! can be directed to read descriptions of either user or system "classic" intrinsics from a SPLINTR file or default to read from a user or system SYSINTR file.

The SPLash! compiler emits code which is fully compatible with the instruction-level debugging facility (e.g., adb, DDE). However, SPLash! does not emit symbolc debugging information at this time. SPLash! can be directed to emit code that causes breakpoints at the statement level, the procedure entry level, and/or the procedure exit level. Breakpoints can be enabled or disabled at any level within the system debugger. SPLash! can also be directed to emit statement numbers which will quickly relate machine code to statement numbers within the source code.

To see a sample of the PA-RISC assembler code SPLash! emits, look here.

The following lists include supported and unsupported opcodes via the ASSEMBLE statement. The third list contains SPLash! opcode extensions.

Fully supported opcodes:

ADAX BLE  CON  DECB DXBZ FNEG LDPN MFDS ORI  SCU  SUBI XBR
ADBX BNCY CPRB DECM DXCH FSUB LDPP MOVE PARC SCW  SUBM XBX
ADD  BNE  CSL  DECX DZRO HALT LDX  MPY  PAUS SDEA SUBS XCH
ADDD BNOV CSR  DEL  EADD IABZ LDXA MPYD PCAL SED  SXIT XCHD
ADDI BOV  CVAD DELB ECMP INCA LDXB MPYI PCN  SETR TASL XEQ
ADDM BR   CVBD DFLT EDIV INCB LDXI MPYL PLDA SIN  TASR XOR
ADDS BRE  CVDA DISP EMPY INCM LDXN MPYM PSDB SIO  TBA  XORI
ADXA BRO  CVDB DIV  ENEG INCX LLBL MTBA PSEB SLD  TBC  ZERO
ADXB BTST DABZ DIVI ENDP INIT LLSH MTBX PSHR SMSK TBX  ZROB
ADXI CAB  DADD DIVL ESUS IXBZ LMPY MTDS PSTA SRD  TCBC ZROX
AND  CIO  DASL DLSL EXF  IXIT LOAD MVS  QASL SSEA TEST
ANDI CMD  DASR DLSR EXIT LADD LOCK MVBL QASR SST  TIO
ASL  CMP  DCMP DMPY FADD LCMP LRA  MVBW RCLK STAX TNSL
ASR  CMPB DCSL DMUL FCMP LDB  LSL  MVLB RMSK STB  TNSR
BCY  CMPD DCSR DNEG FDIV LDD  LSR  NEG  RSW  STBX TRBC
BE   CMPI DDEL DPF  FIXR LDEA LST  NOP  SBXI STD  TSBC
BG   CMPM DDIV DSUB FIXT LDI  LSUB NOT  SCAC STOR UNLK
BGE  CMPN DDUP DTST FLT  LDIV MABS NSLD SCAN SUB  WIO
BL   CMPT DECA DUP  FMPY LDNI MOS  OR   SCLK SUBD XAX

Unsupported opcodes:

ABSD ALGN CVND EDIT LDW  MQFV NEGD SEML SIOP WIOC
ABSN CMPS DUMP HIOP LDDW MQTV RIOC SINC STRT

Opcode extensions:

BRK  BRK2 CLOV DLSZ EPID   KSO  MFSP MTSP PROBER RSYSG SWT2 WTOB
BRK1 CLCY DIVD DPID FINDDB MCAL MFVA MTVA PROBEW SWT   SWT3

Updated: 2001-12-06